The output signal on digital output lines can be affected by noise introduced into the signal by any of a number of factors, including, environmental factors or operating conditions of the circuit, load on the circuit, component processing variations, etc. The noise can cause poor performance, and in some cases prevent compliance with governing standards for input/output (I/O) communication on the output line. In particular, noise can affect high speed serial interfaces, which can experience EMI (electromagnetic interference) problems if the output common mode noise rises above certain levels. For semi-differential buffers with channel equalization (preemphasis and deemphasis), the common mode noise is a design challenge due to the VDS modulation effect on transistor current source and low power supply level. The VDS modulation effect refers to the fact that the current may be affected by changes in the voltage difference between the drain (D) and source (S), which may reduce a saturation margin, which modulates the current. As used herein, a preemphasis bit refers to a transitioning bit and deemphasis bit refers to a non-transitioning bit.
An output driver is traditionally used to amplify the input signal as well as provide common mode rejection. Differential drivers or differential amplifiers to drive the output line are known and commonly used to achieve the necessary amplification as well as providing common mode rejection on the output signal. However, full differential amplifiers are expensive in terms of component count, die or circuit area, and power consumption. The fully differential driver also increases pad capacitance and degrades return loss. Fully complimentary circuits used to produce differential amplifiers are also more sensitive to process mismatches. Fully differential buffers are also complicated on die termination schemes.
Descriptions of certain details and implementations follow, including a description of the figures, which may depict some or all of the embodiments described below, as well as discussing other potential embodiments or implementations of the inventive concepts presented herein. An overview of embodiments of the invention is provided below, followed by a more detailed description with reference to the drawings.